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Cache Problem

  CSc 314 Study Material

Here is a diagram of a cache having eight lines of four words (16 bytes) each.
V Tag 0123
0
1
2
3
4
5
6
7
0       
0       
0       
0       
0       
0       
0       
0       

Below is a string of memory references given in binary. Classify each one as a hit or a miss, assuming that all entries are invalid to start. Also show the final state of the cache using the diagram. In the cache final state, show the valid bit for each entry. For each valid entry, show the tag, and show the memory address whose contents each data word is a copy of. Show the full address of the word, i.e., the address of the first byte of the word, which is a multiple of four.

110111010100
011010110000
110011001000
110111010100
011010111100
100010110100
110011001100
011010110100

The references are classified as followed:

110111010100 Miss
011010110000 Miss
110011001000 Miss
110111010100 Hit
011010111100 Hit Brought in with first reference.
100010110100 Miss Tags differ, line replaced.
110011001100 Hit
011010110100 Miss Tags differ after previous replacement.

The final form of the cache is as follows:

V Tag 0123
0
1
2
3
4
5
6
7
0       
0       
0       
1 01101 M[011010110000]M[011010110100]M[011010111000]M[011010111100]
1 11001 M[110011000000]M[110011000100]M[110011001000]M[110011001100]
1 11011 M[110111010000]M[110111010100]M[110111011000]M[110111011100]
0       
0