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Study Guide III

  CSc 314 Study Material

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Study guide for exam III.
  1. Understand the pipelined MIPS subset implementation.
    1. Understand the idea of a pipeline, and how it improves performance. Know that pipelines can improve throughput, but not the execution time of any single instruction.

    2. Understand what the five pipeline stages of the MIPS subset are, and what is accomplished in each one.

    3. Understand the diagram of Fig. 6.30. For any given instruction at any stage of the pipeline, be able to say what is being carried on the various lines, and what is stored in the pipeline registers.

    4. Know what data hazards and control hazards are. Know the various ways of dealing with them.

    5. Know what a delayed branch is, what a delay slot is, and how compilers can work with them.

    6. Know what a stall is, what one might be used for, and why one would rather not use one.

    7. Know what forwarding is and what problem it solves.

    8. Know what branch prediction is, the difference between static and dynamic, and difference between one-bit and two-bit dynamic branch prediction. Understand Fig. 6.53.

    9. Know what problems exceptions pose for a pipelined architecture.

    10. Know what "superscalar" means, and what dynamic pipelining is.

  2. Understand the concept of a memory hierarchy.

  3. Understand memory caching.
    1. Understand the differences between a simple (fixed-location) block cache, a fully-associative cache, and a set-associative cache.

    2. Be able to show you understand how caches function by doing a small example.

    3. Know the difference between write-back and write-through.

    4. Know what temporal and spatial locality are, and the difference between them.

    5. Know how caches can take advantage of the two types of locality, and how this relates to the width of the cache.

    6. Know what a cache hit is.

  4. Understand virtual memory.
    1. Know the terms: virtual address, real address page, page frame, page fault, page table, translation lookaside buffer.

    2. Be able to show you understand how virtual memory works by doing a small example as done in lecture.

    3. Know what a TLB does, and why it is needed.

  5. Understand the four questions of Section 7.5, and how they are answered for cache and for virtual memory.
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