Some problems from the textbook which would be worth looking at:
| Chapter 1: | Probs. 1, 3, 6, 9, 10, 12, 13, 17, 32 | |
| Q 13: | I assume he means the minimum time to complete all tasks under the stated assumptions | |
| Does a type 1 hypervisor need to handle interrupts from the real hardware? How about type 2? | ||
| Chapter 2: | Probs. 1, 7–9, 14, 17, 26, 31, 38, 39, 43, 45, 51, 55 | |
| Q 7: | The assumption is that I/O operates in parallel, so both jobs can wait at the same time, but only one can run on the CPU | |
| Q 43: | When Q=∞, that means no preemption, so RR becomes FCFS. | |
| Chapter 3: | Probs. 3, 5, 9, 11, 13, 16, 20, 22, 24, 27, 28, 31, 36, 38, 42, 48, VM lookups | |
| Q 16: | The “page replacement” in part (c) apparently refers to the time to replace a TLB entry with a different one from the page table, not the usual meaning of replacing a real memory page. | |
| Q 20: | The assumption is that first-level PTEs for unused second-level page tables can just be marked invalid, so unused second-level tables need not exist at all. | |
| Q 27: | Mostly interested in part (a). Interpret “page allocation” to mean the size of real memory. Any solution for (b) would probably be an algorithm that works for (b), but doesnt work well in the general case.' | |
| Suppose some program performs 10 million memory references. It takes one 10ns to store or fetch a memory location. It takes 10ms to process a page fault. How much time does the program spend on memory access memory if (a) there are no page faults, (b) 0.05% of references create a page fault, (c) 1% of reference create a page fault? | ||
| Chapter 4: | Probs. 5, 6, 8, 23–25, 31, 32, 37 | |