1. CPU
   1. Registers
      1. General purpose.
      2. Program counter.
      3. Stack pointer.
      4. “Program Status Register”
   2. Program state.
      1. Saving and restoring state.
      2. Traps.
      3. Interrupts.
      4. Pipelines complicate the idea of the “current state”.
   3. Context switch.
      1. Change which program is running.
      2. Save the CPU registers and replace them with saved copies from another running program.
   4. Traditionally a single CPU with a single thread of execution.
      1. Multi-threaded processor.
         1. Hyperthreaded is Intel's term.
         2. Multiple register sets.
         3. Multiple threads running on the CPU at once.
         4. CPU can switch between them rapidly without copying to memory.
      2. Multi-core. Essentially multiple CPUs on the same chip.
2. Memory system.
   1. Addressing.
   2. Main memory.
   3. Cache.
3. I/O
   1. Devices.
      1. Usually much slower than the CPU.
      2. Communication over buses.
         1. Disk buses: SATA now standard; older PC buses, SCSI, IDE
         2. General internal buses: PCIe (replaces PCI), previous ISA bus.
         3. External connections: USB. Previously RS232 serial or PC parallel.
         4. Note: This list often manages to get out of date.
      3. Storage devices.
         1. Mechanical disks.
            1. Slow.
            2. Operation order is important.
         2. Solid-State storage (flash).
            1. Reads are much faster than disks.
            2. Order doesn't matter.
            3. Writes wear the device, and must be distributed.
   2. I/O Device Communication
      1. CPU talks to devices by fetching and storing control registers located in the device controller.
      2. The store or fetch may be used to trigger some action by the device, as well as transferring a value.
      3. Two ways to address control registers.
         1. Memory mapped: assigned memory addresses.
         2. Port address space: own address space.
   3. Device Control
      1. Polling.
      2. Interrupts
      3. DMA
4. Hardware Features Needed by the Operating System.
   1. Traps and interrupts. Allows the O/S to gain control.
   2. CPU modes: User and supervisor (or kernel) mode.
      1. Some instructions allowed only in supervisor mode.
         I/O instructions, for instance.
      2. Traps and interrupts (including syscall) enter supervisory.
      3. Switch to user before running user code.
      4. Reserves some operation to O/S kernel only.
   3. Memory Protection. Enforce allocations of memory.
      1. OS can't do this when user code is running.
      2. Creates an interrupt on violations.
   4. Clock interrupt. Preserves OS control.

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